The Verilog® Hardware Description Language 5th Edition

goodnice cool

I've been using VHDL for a long time for FPGA designs but now need to move over to Verilog for new projects. So far I've only read through the Introduction chapter but I can already read and write simple demo Verilog code (blinky.v). I only gave it 4 stars since, like all these books, it assumes I'm simulating on a much more detailed level than the standard FPGA simulator. This requires skipping sections and mentally editing out the simulation commands from examples.I expect the rest of the book will be as good as the intro, I'll update this if anything changes.

I thought this book was great. It covers the verilog language in a way that makes it clear exactly how the simulator works, so you can predict the results of your program with confidence. This book is also very clear as to what hardware will be generated by what constructs. The very important difference between latches and flip-flops is fully covered here, as is a full description of which constructs will generate (probably unwanted) latches. This was my third Verilog book, and this was the only one that left me feeling confident as to the extent of my knowledge. This is the only one you need.The only shortcoming of this book is that the authors decided not to cover every llittle bit of verilog, which would have removed the need to consult the standard. Since the standard is so unreadable, I think that this was a crying shame, but I don't think that this will pose a real problem for most readers. Besides, I haven't seen a credible alternative.

Like most books on verilog or VHDL, this book barely touches on how to write testbench code.The RAM example code was quite useful for me.

Did not arrive with the CD mentioned in description

'The Verilog Hardware Description Language' is a very good tutorial and reference for intermediate designers.I used this book in an upper level hardware design course. The course had a beginning Verilog course as a prerequisite. I hadn't taken that course but I had experience in digital design and VHDL. This book got me up to speed quickly with it's many examples and tight explanations of the Verilog Language.Some pluses:-Example designs are short, complete, and simulatable. Most are even synthesizable. This is good because an example can be quickly understood in its entirety. You don't need to flip through and stare and multiple pages to get an idea of what's going on. If you insist on having them, there are two long, practical examples towards the end of the book.-The text is very well written. Similar in style to 'The C Programming Language by Kernighan and Ritchie.'-Verilog 2001: Focuses on 2001, which is a little clearer than previous standards. I think all tools support 2001 by default now so that should be used.Some minuses:-Too expensive.-Not enough discussion on how Verilog constructs are compiled and netlisted. This is critically important in FPGA/ASIC design. However, this book is not any worse than other HDL books in this respect. It's just so important, I really haven't seen anything that gives the topic the treatment it deserves.Possible minus:-Not really for beginners. This is not a hardware design text.I haven't used the CD that came with the book so I can't comment on that. My guess is anything on that CD is not as good as industry standard tools like Mentor's ModelSim.Overall a very impressive book that will get you to productivity quickly in a Verilog project.

The claim that this book has become the standard for learning Verilog is true.I use Verilog a lot but I still wish I had read this book before writing Verilog codes.

I really liked the book since I had read a copy from my school library hence I decided to purchase one. Unfortunately since Amazon doesn't set any standards that all sellers should meet, my purchase was a rip off.I order the book assuming it was a North American Copy Unfortunately The one that I received was printed in CHINA & FULL OF GRAMMATICAL MISTAKES please watch out for the seller "Express_Textbook" do not purchase unless u want a Chinese Version.The seller does not specify this information so once you have made a transaction you'd have to go through the hassle of returning it.A NOTE TO AMAZON ADMIN: PLEASE INSIST SELLERS WHEN SELLING NEW PRODUCTS TO SPECIFY DETAILS SO THAT CUSTOMERS CAN MAKE THE RIGHT CHOICE.

excellent transacton

多くのVerilog－HDL（以下,verilog)解説本があります.この本は,verilogを使い,ハードウェアをbehavior,RTL,gateそれぞれの階層で表現する方法を説明しています.設計の上流から下流まで,verilogでどう表記するかが,しっかり記述してあります.テストベンチ,cycle accurateなモデルについても記述があります.5版はIEEE1364-2001の説明があります.Verilogを使う人以外にも,Cynlib,SystemCなどを使い,ソフト屋さんがハードを設計する場合に,少なくとも1章だけでも読んでおけば,記述するソースの質が上がるはずです.よい点は:論理合成可能な表記について,しっかり記述してあり,参考になります.アメリカの教科書のように,章毎に豊富な例題があります.付録のCD-ROMには,verilogシミュレータ"Silos 2001"とサンプルがあり,実際にシミュレーションができます.付録に,BNF表記でverilogの言語仕様があります.悪い点は:Dynamic回路の記述に1章を当てていますが,いまどきDynamicな回路を設計する人がいるのか,疑問に思います.価格が,多少高すぎると思います.

Hatte mir eigentlich auf Grund des hohen Preises mehr erhofft, allerdings werden tiefgründigere Dinge nicht beschrieben. Über Register wird genau 1,5 Seiten lang gesprochen das wars! Hätte mehr erwartet deshalb auch die Rücksendung.